⚡ Assembly Language - jyunzhang · Scour

[TUHS] bare m4 (was BTL summmer employees)

tuhs.org·14h·

Discuss: Lobsters

🔗Parser Combinators

Samsung: "Expanding CPU Capabilities for On-device AI with Arm SME2 [as implemented in the Exynos 2600]"

semiconductor.samsung.com·1d·

Discuss: r/hardware

🏗Computer Architecture

Discussion - Investigation of Single Thread CPU "Thoughput/cycle"

forums.anandtech.com·7h

🏗Computer Architecture

borodark/exmc: Probabilistic programming in BEAM

github.com·10h

SectorC: a C compiler in 512 bytes

blog.adafruit.com·2d

⚙️Systems Programming

Interesting things about the Lua interpreter

thesephist.com·1d

🏗Computer Architecture

Can AI Code for Vintage?

sparcie.wordpress.com·18h

⚡Code Generation

Benchmarking Claude C Compiler

dineshgdk.substack.com·1d·

Discuss: Substack, r/programming

⚙️CPU Microarchitecture

Quick Stack Tiedown

artlu.bearblog.dev·11h

Arduino vs Raspberry Pi: What's the difference?

techradar.com

·19h

🏗Computer Architecture

OSDev Bare Bones with Rust - Cross-Compilation and Freestanding

dev.to·1d·

Discuss: DEV

STM32F4 - ARM Cortex-M4 High-Performance MCUs

st.com·2d

🏗Computer Architecture

Win11 26H1 is ARM only apparently

forums.anandtech.com·16h

⚡CPU Architecture

Building DamN64: LLM-Assisted N64 Development

vieux.fr·11h·

Discuss: Hacker News

🎮Game Engines

Decoupled MPPI-Based Multi-Arm Motion Planning

arxiv.org·1d

🎮Reinforcement Learning

Bitsum. Real-time CPU Optimization and Automation

bitsum.com·8h

🚀Performance Engineering

Recent OP_RETURN output statistics

delvingbitcoin.org·9h

🏗Computer Architecture

RISC-V Mentorship Taught Me the RISC-V ISA Is Far More Than a Reference Manual

riscv.org·1d

🏗Computer Architecture

From Breadboard to Perf Board (Part 1)

tomsantunes.substack.com·6h·

Discuss: Substack

⚡Circuit Design

Deep C Dives: Undefined Behavior

i-programmer.info·18h

🛡️Memory Safety

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